From 0404f77e70af63fe1b79a127884d31a6eb8d280a Mon Sep 17 00:00:00 2001 From: Glenn Morris Date: Sat, 11 Nov 2006 04:02:58 +0000 Subject: [PATCH] (vhdl-reset-active-high, vhdl-clock-rising-edge): Improve previous doc fixes. --- lisp/progmodes/vhdl-mode.el | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lisp/progmodes/vhdl-mode.el b/lisp/progmodes/vhdl-mode.el index b8399bfafb..60c3e1c314 100644 --- a/lisp/progmodes/vhdl-mode.el +++ b/lisp/progmodes/vhdl-mode.el @@ -1023,13 +1023,13 @@ NOTE: Activate the new setting in a VHDL buffer by using the menu entry (defcustom vhdl-reset-active-high nil "*Non-nil means reset in sequential processes is active high. -nil means active low." +Otherwise, reset is active low." :type 'boolean :group 'vhdl-sequential-process) (defcustom vhdl-clock-rising-edge t "*Non-nil means rising edge of clock triggers sequential processes. -nil means falling edge." +Otherwise, falling edge triggers." :type 'boolean :group 'vhdl-sequential-process) -- 2.39.2